This application claims benefit of priority under 35USC 119 based on Japanese Patent Application No. P2000-295097, filed on Sep. 27, 2000, the entire contents of which are incorporated by reference herein.
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device having a low dielectric constant insulating film, to a wafer processing equipment depositing and exposing a low dielectric constant insulating film, and to a wafer storing box storing a semiconductor wafer during transfer between wafer processing equipments. More particularly, the present invention relates to a method for manufacturing a semiconductor device using an interlayer insulating film, including the low dielectric constant insulating film, which has weak properties as to the peeling or cracks of a film and the like.
2. Description of the Related Art
Along with a recent progress in highly integrated and miniaturized semiconductor integrated circuits, a manufacturing system for a semiconductor integrated circuit is usually disposed in a clean room. The temperature of the clean room is controlled at about 23xc2x0 C. under a relative humidity (RH) of about 40% with the intention of removing dusts and static electricity. A semiconductor wafer during the course of manufacture is exposed to a clean room atmosphere, which is controlled in the above temperature and humidity condition for a undefined period of time. The undefined period of time includes during carrying-in and carrying-out of the wafer from various wafer processing units and during the transfer and storage between manufacturing stages.
On the other hand, a recent progress in large-scaled and high-speed semiconductor integrated circuits is accompanied by progresses in multi-level of wiring and thin interlayer insulating films. However, the decrease of the thickness of the thin interlayer insulating film increases a parasitic capacitance between wirings, which is an obstacle to a high-speed circuit operation. In order to decrease the parasitic capacitance between wirings, a low dielectric constant insulating film, known as xe2x80x9clow kxe2x80x9d film is required as the interlayer insulating film. As the low k dielectric film may include a silicon oxide (SiO2) film containing an organic component (hereinafter referred to as xe2x80x9cLKDxe2x80x9d film) and a fluorinated silicon oxide film (SiOF film). The SiOF film is generally called xe2x80x9cFSG film (Fluorinated Silica Glass film)xe2x80x9d. The SiOF film is reduced in dielectric constant by adding fluorine to silicon oxide (SiO2). Multi-level wiring technologies using these low dielectric constant insulating films as the interlayer insulating films are commonly used.
An aspect of the present invention inheres in a method for manufacturing a semiconductor device comprising controlling a humidity in an atmosphere around a low dielectric constant insulating film at 30% or less during a processing period and a transfer period between processing equipments in which at least a part of the low dielectric constant insulating film is exposed to the atmosphere.
Another aspect of the present invention inheres in a wafer processing equipment comprising a wafer processing chamber which provides a semiconductor wafer with a predetermined treatment, a transfer tube which is connected to the wafer processing chamber and through which the wafer is carried into and out from the wafer processing chamber, and a humidity control unit which controls the humidity of the transfer tube at 30% or less.
Still another aspect of the present invention inheres in a wafer storing box comprising a wafer storing chamber which stores a semiconductor wafer on which a low dielectric constant insulating film is deposited, and a humidity control unit which controls the humidity of the wafer storing chamber at 30% or less.